The present invention relates in general to semiconductor devices and, more particularly, to a high-speed semiconductor device structure and a method of manufacturing the same.
In modern day electronic industries, high-speed data processing is very important. Circuits must respond to very high input data frequencies. Emitter coupled logic (ECL) gates are implemented with transistors that have a high-speed capability. However, as the input frequency is increased, the transistor""s forward current gain decreases. The frequency at which the current gain decreases to one is called the unity gain frequency (f"ugr") or simply the xe2x80x9ccut-offxe2x80x9d frequency. Further increases in frequency reduce the current gain to less than unity, thereby reducing the performance of the logic gates.
The transistors in high-speed logic circuits should be designed to work at high frequencies as well as high current and power gains. One method of achieving high current and power gains at high frequencies is to shrink the base widths of the transistors and utilize heterojunction materials to form the transistors. For example, some transistors are formed using silicon-germanium (Sixe2x80x94Ge) or silicon-germanium-carbon (Sixe2x80x94Gexe2x80x94C) in the base region while using silicon in the emitter region. Such transistors have brought significant improvements in the frequency response of the circuit due to the lower energy gap these materials have over transistors having both bases and emitters formed with silicon. Transistors formed using Sixe2x80x94Ge or Sixe2x80x94Gexe2x80x94C are called Heterojunction Bipolar Transistors (HBT). HBTs often operate at a cut-off frequency of at least thirty GHz.
A problem with current HBT transistors is their high cost due to the complex processes needed to form the emitter-base heterojunction. The cost is further increased because of the expensive equipment needed to perform these processes and the large area of a manufacturing facility needed for the equipment. A further problem is that the quality of emitter-base region can be degraded if the transistor is subjected to many elevated temperature cycles typically employed to deposit and remove these films. Such elevated temperatures result in misfit dislocations that relax the strain in the crystal lattice structure. These misfits create current leakage paths and recombination centers that significantly decrease electrical performance of the transistor.
Hence, there is a need for a heterojunction transistor device and manufacturing method that lowers the manufacturing cost without degrading the transistor""s electrical performance.